Signal Assignment StatementsRevisited (Cont.)
Concurrent signal assignment syntax:
- A postponed concurrent signal assignment statement is equivalent to a one line postponed process
- Example conditional signal assignment statement :
- Example selected signal assignment statement :
- UNAFFECTED may be used as the assignment value
- No event is assigned to output -- New for VHDL93
[label :] [POSTPONED] [GUARDED] conditional_signal_assignment
| [label :] [POSTPONED [GUARDED] selected_signal_assignment
S3 <= 0 AFTER 2 ns WHEN (x=‘0’ and y=‘0’) ELSE
1 AFTER 5 ns WHEN (x=‘1’ and y=‘1’) ELSE
S3 <= 0 AFTER 3 ns WHEN 0,
2 AFTER 5 ns WHEN OTHERS;
The syntax for concurrent signal assignment statements is shown here. Note that there are two types of concurrent signal assignment statements, conditional and selected. The conditional signal assignment statement is very general in that any readable signals or inputs may be tested to determine the value to be assigned to the target. Note that the simple concurrent signal assignment statement (e.g. A <= B;) is simply the degenerate case of a conditional signal assignment statement.
The selected signal assignment statement is reminiscent of a CASE statement in that the condition of a predetermined signal is examined to determine the value to be assigned to the target.
The keyword UNAFFECTED may be used as the assignment value so that the output can be left unchanged when the required conditions for such an (in)action are met.