NEXSW Project Status
Project File: nexsw.ise Current State: Programming File Generated
Module Name: stopwatch
  • Errors:
No Errors
Target Device: xc3s500e-4fg320
  • Warnings:
3 Warnings
Product Version: ISE 9.2i
  • Updated:
Wed May 21 02:25:14 2008
 
NEXSW Partition Summary
No partition information was found.
 
Device Utilization Summary
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 80 9,312 1%  
Number of 4 input LUTs 118 9,312 1%  
Logic Distribution     
Number of occupied Slices 94 4,656 2%  
    Number of Slices containing only related logic 94 94 100%  
    Number of Slices containing unrelated logic 0 94 0%  
Total Number of 4 input LUTs 174 9,312 1%  
Number used as logic 118      
Number used as a route-thru 56      
Number of bonded IOBs 19 232 8%  
Number of GCLKs 1 24 4%  
Total equivalent gate count for design 1,735      
Additional JTAG gate count for IOBs 912      
 
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentFri May 16 23:39:30 200803 Warnings0
Translation ReportCurrentFri May 16 23:40:06 2008000
Map ReportCurrentFri May 16 23:40:32 2008003 Infos
Place and Route ReportCurrentFri May 16 23:41:16 2008002 Infos
Static Timing ReportCurrentFri May 16 23:41:38 2008003 Infos
Bitgen ReportCurrentFri May 16 23:42:04 2008000