Example From UVA ADEPT
The following example is based on the performance and reliability modeling tool, ADEPT, developed at the University of Virginia
- Note that the implementations of the modules shown here are greatly simplified subsets of those actually used in ADEPT
Some particularly useful features of this example :
- A complex Bus Resolution Function is used to achieve an embedded fully interlocked handshake protocol between communicating components
- VHDL procedures and functions are used extensively to hide the implementation details of the underlying behavior
This section presents the description of some simple performance modeling elements that are based on elements from UVA’s ADEPT tool. This example will illustrate the use of a Bus Resolution Function to implement an embedded communication protocol used to pass information between components. In addition, functions and procedures are used extensively throughout the example to enhance readability and reuse as well to abstract away implementation details.