“wait until” and “wait for”

• What do these do?

Summation: PROCESS

BEGIN

Sum <= A XOR B XOR Cin;

WAIT UNTIL A = ‘1’;

END PROCESS Summation;

Summation: PROCESS

BEGIN

Sum <= A XOR B XOR Cin;

WAIT FOR 100 ns;

END PROCESS Summation;

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The first process above executes once at the beginning of the VHDL simulation and then suspends until the input A is assigned a value of ‘1’ before it executes again. This cycle continues in that the process executes every time A is assigned a value of ‘1’.

The second process also executes once at the beginning of the VHDL simulation, but it then waits for 100ns of simulation time and executes again. This cycle continues with the process executing every 100ns of simulation time.