A Design Example 2-bit Counter

ENTITY count2 IS

GENERIC(prop_delay : TIME := 10 ns);

PORT (clock : IN BIT;

q1, q0: OUT BIT);

END count2;

ARCHITECTURE behavior OF count2 IS

BEGIN

count_up: PROCESS (clock)

VARIABLE count_value: NATURAL := 0;

BEGIN

IF clock='1' THEN

count_value := (count_value+1) MOD 4;

q0 <= bit'val(count_value MOD 2) AFTER prop_delay;

q1 <= bit'val(count_value/2) AFTER prop_delay;

END IF;

END PROCESS count_up;

END behavior;

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In this example, we show a model for a simple 2-bit counter which counts clock pulses. The component has clock as an input, and two outputs which represent the LSB and MSB of a two-bit unsigned number.

Several of the constructs used above have not been shown before in this series of educational modules. For example, bit'val(count_value mod 2) is a function which returns a value of type bit; count_value is a natural number (i.e. an integer greater than, or equal to, zero); count_value mod 2 returns the LSB value of the counter value; but the LSB value is of type natural. Since we want the LSB to be of type bit instead, we cast it by using the 'val (read as "tic val") attribute on the type bit.

Also note the use a a generic parameter used to facilitate the assignment of delays in the signal assignment statements.