ARCHITECTURE example OF full_adder IS
-- Nothing needed in declarative block...
Summation: PROCESS( A, B, Cin)
Carry: PROCESS( A, B, Cin)
Now we put the entire architecture together. The two process defined on the previous slide are placed in the same architecture. Note that the Sum and Carry processes execute concurrently.
This model does not use explicit time (that is, there are no AFTER phrases or “wait for” statements. Thus, this model is purely functional. If timing is important, delay phrases (i.e., AFTER clauses) to the signal assignment statements, or “WAIT FOR” statements can be added in the processes.
Note that if wait statements are used in a process, the process cannot have a sensitivity list.