Slide 15 of 65
Sequential statements are used within processes and are executed in a top-down fashion. The illustrative (but incomplete) list shown on this page includes many of the commonly used forms. The VHDL Language Reference Manual provides a complete list.
Many of these statement types will be explained in further sections of this module. Some of you may note that these control structures operate almost exactly like their counterparts in Ada except for the assert and sequential signal assignment statements.