Models can be constructed by interconnecting subcomponents
- A structural model lists the required subcomponents and prescribes their interconnections
- Akin to a design schematic :
Structural VHDL allows a designer to describe a model in terms of sub-components and their interconnections. In this figure, simple logic elements are used to design a full adder. A structural description views the hardware as a netlist or schematic of the device; the components and interconnections are visible, but the internal functions are hidden.