Signals and Variables
This example highlights the difference between signals and variables
ARCHITECTURE test1 OF mux IS
ARCHITECTURE test2 OF mux IS
- Assuming a 1 to 0 transition on in_sig, what are the resulting values for y in the both cases?
Note that signal assignments require that a delay be incurred before the signals assume their new values.
In the example on the left, the signal assignment for x leads to a ‘0’ being scheduled on x one delta cycle in the future. Note that x still holds its original value of ‘1’, however, when the signal assignment for y is evaluated. Thus, the signal assignment statement for y evaluates to ‘1’, and y will assume this new value one delta cycle in the future. This contrived example actually leads to x and y swapping values in delta time while in_sig has a value of ‘0’.
In the example on the right, the variable assignment for x leads to x assuming a ‘0’ immediately. Thus, when the signal assignment for y is evaluated, x already has its new value and the statement evaluates to a ‘0’, resulting in y retaining its original value. This example does not perform the swapping in delta time that would be performed by the example on the left.