VHDL Data TypesComposite Types
TYPE data_bus IS ARRAY(0 TO 31) OF BIT;
Y := X(12); -- Y gets value of element at index 12
- Used to group elements of the same type into a single VHDL object
- Range may be unconstrained in declaration
- Range would then be constrained when array is used
- Example declaration for one-dimensional array (vector) :
VHDL composite types consists of arrays and records. Each object of this data type can hold more than one value.
Arrays consist of many similar elements of any data type, including arrays. The array is declared in a TYPE statement. There are numerous items in an array declaration. The first item is the name of the array. Second, the range of the array is declared. The keywords TO and DOWNTO designate ascending or descending indices, respectively, within the specified range. The third item in the array declaration is the specification of the data type in each element of the array.
In the example above, an array consisting of 32 bits is specified. Note that individual elements of the array are accessed by using the index number of the element as shown above. The index number corresponds to where in the specified range the index appears. For example, X(12) above refers to the thirteenth element from the left (since the leftmost index is 0) in the array.