All declarations of VHDL ports, signals, and variables must specify their corresponding type or subtype
The three defined data types in VHDL are access, scalar, and composite. Note that VHDL 1076-1987 defined a fourth data type, file, but files were reclassified as objects in VHDL 1076-1993. In any case, files will not be discussed in this module but will be covered in RASSP E&F Module 13, 'Advanced Concepts in Level VHDL’, included in this collection of educational modules.
Simply put, access types are akin to pointers in other programming languages, scalar types are atomic units of information, and composite types are arrays and/or records. These are explained in more detail in the next few slides. In addition, subtypes will also be introduced.