VHDL/Quicksim Cosimulation using QSPRO

1. What you will learn

    1.1 How to compile a VHDL description for simulation with other Mentor parts.
    1.2 How to create a symbol for the VHDL description.
    1.3 How to instantiate this symbol in another schematic with generic Mentor parts.
    1.4 How to simulate the resulting schematic with QSPro .

    In order to complete this tutorial, it is expected that you already have some knowledge in the use of Design Architect to create symbols and schematics. If this is not the case, complete the applicable tutorials before attempting to proceed with this one.

2. Generate and compile the and2 component for simulation with QSPro and generate a symbol for it

3. Construct a schematic for and AND-OR-INVERT (AOI) gate using the and2 component and gen_lib parts

    3.1 Open a schematic sheet in DA for a component called aoi. Use the button to bring up the Add Instance | Choose Symbol dialog box and select the and2 symbol. Add an or2 and inv component from the gen_lib library and construct a schematic like the one below. Don't forget to modify the rise and fall properties on the or2 and inv components, add INST properties to these two components, and name all of the nets.

    3.2 Check and Save the aoi sheet and exit DA .

4. Simulate the aoi component with QSPro

    4.1 Start the QSPro tool on the aoi component:

>>qspro -tim typ aoi &

    A number of messages will be printed in the transcript window, and a OSPro(Quicksim II) and QSPro(HDL) window will appear as shown below.

    QSPro uses a backplane called Flexsim to hook the ModelSim and QuickSim tools together to simulate designs which contain both VHDL components and regular Mentor Graphics ( Quicksim ) components. Within QSPro , you can use the Quicksim GUI to manipulate (trace, force, etc.) signals in the Quicksim portion of the design, and the ModelSim GUI to manipulate signals in the VHDL portion of the design. However, you can also use the Quicksim GUI to manipulate signals in the VHDL portion of the design as well, so it is easiest to simply do it there.

    4.2 Make the Quicksim window active by clicking on its top edge, and open the schematic sheet. Use the Select->All->Net menu item to select all of the nets in the design and use the Add->Traces->Selected item to trace the signals. Use the Unselect->All menu item to unselect the signals.

    4.3 To simply illustrate how signals can also be traced in the QHSim GUI, use the Solver->HDL menu item to bring the HDL menu to the top menu bar of the Quicksim window. Next use the Select->Area->Pin: menu item and draw a box ONLY around the and2 component so that its pins are selected. Then use the HDL->Wave... menu time to bring up the Add HDL Waves dialog box. Make sure that the Selected Objects button is selected and click OK . Notice how a ModelSim wave window appears with the /aoi_qsim/and2/a, /aoi_qsim/and2/b , and /aoi_qsim/and2/c signals (the inputs and output of the and2 VHDL component) in it.

    4.3 Unselect all of the pins in the schematic and select the A input and force the following values on it: 0 at 0 ns, 1 at 160 ns, and 0 at 200 ns. Force the B input to 0 at 0 ns, and 1 at 160 ns. Force the C input to 0 at 0 ns, 1 at 80 ns, and 0 at 100 ns. Run the simulation for 240 ns. The result should be a display like the one below (with the ModelSim Wave window on top).

    4.4 Exit the QSPro simulator by closing the Quicksim window.